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ltc4364-1/ltc4364-2 1 436412f typical application features description surge stopper with ideal diode the ltc ? 4364 surge stopper with ideal diode controller protects loads from high voltage transients. it limits and regulates the output during an overvoltage event, such as load dump in automobiles, by controlling the voltage drop across an external n-channel mosfet pass device. the ltc4364 also includes a timed, current limited circuit breaker. in a fault condition, an adjustable fault timer must expire before the pass device is turned off. the ltc4364-1 latches off the pass device while the ltc4364-2 automati - cally restarts after a delay. the ltc4364 precisely monitors the input supply for overvoltage (ov) and undervoltage (uv) conditions. the external mosfet is held off in un - dervoltage and auto-retry is disabled in overvoltage. an integrated ideal diode controller drives a second mos - fet to replace a schottky diode for reverse input protec- tion and output voltage holdup. the ltc4364 controls the forward voltage drop across the mosfet and minimizes reverse current transients upon power source failure, brownout or input short. overvoltage protector regulates output at 27v during input transient ideal diode holds up output during input short 4a, 12v overvoltage output regulator with ideal diode withstands 200v 1ms transient at v in applications n wide operating voltage range: 4v to 80v n withstands surges over 80v with v cc clamp n adjustable output clamp voltage n ideal diode controller holds up output voltage during input brownouts n reverse input protection to C40v n reverse output protection to C20v n overcurrent protection n low 10a shutdown current at 12v n adjustable fault timer n 0.1% retry duty cycle during faults (ltc4364-2) n available in 4mm 3mm 14-lead dfn, 16-lead msop, and 16-lead so packages n automotive/avionic surge protection n hot swap/live insertion n redundant supply oring n output port protection l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. + out sense dgate source hgate tmr gnd 0.22f uv uv 6v ov 60v ov enout enable fault 436412 ta01a f lt shdn fb 10 2.2k 383k v in 12v 90.9k 10k 102k 22f v out clamped at 27v 4.99k cmz5945b 68v fdb33n25 fdb3682 10m 6.8nf v cc ltc4364 50ms/div c tmr = 6.8f i load = 0.5a v in 20v/div 12v 12v v out 20v/div 92v input surge 27v clamp (adjustable) 4364 ta01b 1ms/div c load = 6300f i load = 0.5a v in 10v/div 12v 12v v out 10v/div 4364 ta01c input shorted to gnd output held up
ltc4364-1/ltc4364-2 2 436412f absolute maximum ratings supply voltage: v cc ................................. C40v to 100v source, ov, uv, shdn voltages ............. C40v to 100v dgate, hgate voltages (note 3) ..................... source C 0.3v to source + 10v enout, flt voltages ................................ C0.3v to 100v out, sense voltages ................................. C20v to 100v voltage difference (sense to out) ............ C30v to 30v voltage difference (out to v cc ) .............. C100v to 100v voltage difference (sense to source) .. C100v to 100v (notes 1, 2) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 fb tmr enout flt gnd ov uv out sense dgate source hgate v cc shdn top view 15 de package 14-lead (4mm 3mm) plastic dfn t jmax = 150c, v ja = 45c/w exposed pad (pin 15) pcb gnd connection optional 1 2 3 4 5 6 7 8 out sense nc dgate source hgate nc v cc 16 15 14 13 12 11 10 9 fb tmr enout f lt gnd ov uv shdn top view ms package 16-lead plastic msop t jmax = 150c, v ja = 120c/w top view s package 16-lead plastic so 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 out sense nc dgate source hgate nc v cc fb tmr enout flt gnd ov uv shdn t jmax = 150c, v ja = 100c/w pin configuration order information lead free finish tape and reel part marking* package description temperature range ltc4364cde-1#pbf ltc4364cde-1#trpbf 43641 14-lead (4mm w 3mm) plastic dfn 0c to 70c ltc4364ide-1#pbf ltc4364ide-1#trpbf 43641 14-lead (4mm w 3mm) plastic dfn C40c to 85c ltc4364hde-1#pbf ltc4364hde-1#trpbf 43641 14-lead (4mm w 3mm) plastic dfn C40c to 125c ltc4364cde-2#pbf ltc4364cde-2#trpbf 43642 14-lead (4mm w 3mm) plastic dfn 0c to 70c ltc4364ide-2#pbf ltc4364ide-2#trpbf 43642 14-lead (4mm w 3mm) plastic dfn C40c to 85c ltc4364hde-2#pbf ltc4364hde-2#trpbf 43642 14-lead (4mm w 3mm) plastic dfn C40c to 125c ltc4364cms-1#pbf ltc4364cms-1#trpbf 43641 16-lead plastic msop 0c to 70c ltc4364ims-1#pbf ltc4364ims-1#trpbf 43641 16-lead plastic msop C40c to 85c ltc4364hms-1#pbf ltc4364hms-1#trpbf 43641 16-lead plastic msop C40c to 125c ltc4364cms-2#pbf ltc4364cms-2#trpbf 43642 16-lead plastic msop 0c to 70c ltc4364ims-2#pbf ltc4364ims-2#trpbf 43642 16-lead plastic msop C40c to 85c ltc4364hms-2#pbf ltc4364hms-2#trpbf 43642 16-lead plastic msop C40c to 125c fb, tmr voltages ..................................... C0.3v to 5.5v operating ambient temperature range ltc4364c ................................................ 0c to 70c ltc4364i ............................................. C40c to 85c ltc4364h .......................................... C40c to 125c storage temperature range .................. C65c to 150c lead temperature (soldering, 10 sec) ms, so packages ............................................. 300c
ltc4364-1/ltc4364-2 3 436412f order information lead free finish tape and reel part marking* package description temperature range ltc4364cs-1#pbf ltc4364cs-1#trpbf ltc4364s-1 16-lead plastic so 0c to 70c ltc4364is-1#pbf ltc4364is-1#trpbf ltc4364s-1 16-lead plastic so C40c to 85c ltc4364hs-1#pbf ltc4364hs-1#trpbf ltc4364s-1 16-lead plastic so C40c to 125c ltc4364cs-2#pbf ltc4364cs-2#trpbf ltc4364s-2 16-lead plastic so 0c to 70c ltc4364is-2#pbf ltc4364is-2#trpbf ltc4364s-2 16-lead plastic so C40c to 85c ltc4364hs-2#pbf ltc4364hs-2#trpbf ltc4364s-2 16-lead plastic so C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v cc = 12v. symbol parameter conditions min typ max units v cc operating supply range l 4 80 v i cc supply current v cc = source = sense = out = 12v, no fault l 370 750 a i cc(shdn) supply current in shutdown shutdown l 10 50 a i cc(rev) reverse input current v cc = ?30v l 0 C10 a surge stopper ?v hgate hgate gate drive, (v hgate ? v source ) v cc = 4v, dgate low, i hgate = 0a, ?1a v cc = 8v to 80v, dgate low, i hgate = 0a, ?1a l l 5 10 7 12 9 16 v v i hgate(up) hgate pull-up current v cc = hgate = dgate = source = 12v l C10 C20 C30 a i hgate(dn) hgate pull-down current overvoltage: fb = 1.5v, ?v hgate = 5v l 60 130 ma overcurrent: ?v sns = 100mv, ?v hgate = 5v l 60 130 ma shutdown/fault turn-off: ?v hgate = 5v l 0.4 1 ma i src source input current v cc = source = sense = out = 12v v cc = source = 12v, shutdown v source = C30v l l l 18 32 C2.0 40 90 C3.5 a a ma v fb fb servo voltage v cc = 12v to 80v l 1.22 1.25 1.28 v i fb fb input current fb = 1.25v l 0 1 a ?v sns overcurrent fault threshold, (v sense C v out ) v cc = 4v to 80v, out = 2.5v to v cc , 0c to 125c v cc = 4v to 80v, out = 2.5v to v cc , C40c to 125c v cc = 4v to 80v, out = 0v to 1.5v l l l 45 43 18 50 50 25 55 57 32 mv mv mv i sns sense input current sense = v cc = source = out = 12v sense = C15v l l 55 C2 110 C4 a ma i tmr(up) tmr pull-up current, overvoltage tmr = 1v, fb = 1.5v, v cc C out = 0.5v tmr = 1v, fb = 1.5v, v cc C out = 75v l l C1.3 C40 C2.2 C50 C3 C60 a a tmr pull-up current, overcurrent tmr = 1v, ?v sns = 60mv, v cc C out = 0.5v tmr = 1v, ?v sns = 60mv, v cc C out = 75v l l C6 C210 C10 C260 C14 C310 a a tmr pull-up current, warning tmr = 1.3v, fb = 1.5v, v cc C out = 0.5v l C3 C5 C7 a tmr pull-up current, retry tmr = 1v, fb = 1.5v l C1.3 C2 C3 a i tmr(dn) tmr pull-down current tmr = 1v, fb = 1.5v, retry shutdown l l 1.1 0.3 2 0.75 2.7 1.5 a ma v tmr(f) tmr fault threshold f lt falling, v cc = 4v to 80v l 1.22 1.25 1.28 v v tmr(g) tmr gate off threshold hgate falling, v cc = 4v to 80v l 1.32 1.35 1.38 v
ltc4364-1/ltc4364-2 4 436412f electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v cc = 12v. symbol parameter conditions min typ max units v tmr(r) tmr retry threshold hgate rising (after 32 cycles), v cc = 4v to 80v l 0.125 0.15 0.175 v ?v tmr early warning timer window v tmr(g) C v tmr(f) , v cc = 4v to 80v l 75 100 125 mv v uv uv input threshold uv falling, v cc = 4v to 80v l 1.22 1.25 1.28 v v uv(hyst) uv input hysteresis l 25 50 80 mv v uv(rst) uv reset threshold uv falling, v cc = 4v to 80v, ltc4364-1 only l 0.5 0.6 0.7 v v ov ov input threshold ov rising, v cc = 4v to 80v l 1.22 1.25 1.28 v v ov(hyst) ov input hysteresis 12 mv i in uv, ov input current uv, ov = 1.25v uv, ov = C30v l l 0 C0.3 1 C0.6 a ma v ol enout, f lt output low i sink = 0.25ma i sink = 2ma l l 0.1 0.5 0.3 1.3 v v i leak enout, f lt leakage current enout, f lt = 80v l 0 2.5 a ?v out(th) out high threshold (v cc C v out ) enout from low to high l 0.4 0.7 1 v v out(rst) out reset threshold enout from high to low l 1.4 2.2 3 v i out out input current v cc = out = 12v, shdn open out = C15v l l 40 C4 80 C8 a ma output current in shutdown, i sns + i out v cc = source = sense = out = 12v, shutdown l 12 40 a v shdn shdn input threshold v cc = 4v to 80v l 0.5 1.6 2.2 v v shdn (flt) shdn pin float voltage v cc = 12v to 80v l 2.3 4 6.5 v i shdn shdn input current shdn = 0.5v maximum allowable leakage, v cc = 4v shdn = C30v l l C1 C3.3 C1.5 C120 C300 a a a d retry duty cycle, overvoltage retry duty cycle, output short fb = 1.5v, v cc = 80v, out = 16v ?v sns = 60mv, v cc C out = 12v l l 0.125 0.075 0.2 0.12 % % t off,hgate(uv) undervoltage to hgate low propagation delay uv steps from 1.5v to 1v l 1.3 4 s t off,hgate(ov) overvoltage to hgate low propagation delay fb steps from 1v to 1.5v l 0.25 1 s t off,hgate(oc) overcurrent to hgate low propagation delay ?v sns steps from 0mv to 150mv, out = 0v l 0.5 2 s ideal diode v dgate dgate gate drive, (v dgate ? v source ) v cc = 4v, no fault, i dgate = 0a, ?1a v cc = 8v to 80v, no fault, i dgate = 0a, ?1a l l 5 10 8.5 12 12 16 v v i dgate(up) dgate pin pull-up current dgate = source = v cc = 12v, ?v sd = 0.1v l C5 C10 C15 a i dgate(dn) dgate pin pull-down current ?v dgate = 5v, ?v sd = C0.2v ?v dgate = 5v, shutdown/fault turn-off l l 60 0.4 130 1 ma ma ?v sd ideal diode regulation voltage, (v source ? v sense ) ?v dgate = 2.5v, v cc = source = 12v ?v dgate = 2.5v, v cc = source = 4v l l 10 24 30 48 45 72 mv mv t off(dgate) dgate turn-off propagation delay ?v sd steps from 0.1v to C1v l 0.35 1.5 s note 1: stress beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: all currents into device pins are positive and all currents out of device pins are negative. all voltages are referenced to gnd unless otherwise specified. note 3: internal clamps limit the hgate and dgate pins to minimum of 10v above the source pin. driving these pins to voltages beyond the clamp may damage the device.
ltc4364-1/ltc4364-2 5 436412f typical performance characteristics i sns + i out in shutdown vs v cc i cc(shdn) vs temperature gate pull-up current vs v cc ?v hgate vs i hgate ?v dgate vs i dgate ?v hgate vs v in in figure 1 supply current vs v cc i cc(shdn) vs v cc ?v dgate vs v in in figure 1 v cc (v) 0 supply current (a) 250 300 350 80 436412 g01 200 100 150 0 20 40 60 10 30 50 70 50 450 400 v cc = source = sense = out i cc i src i sns + i out v cc (v) 0 0 i cc(shdn) (a) 10 20 30 40 20 40 60 80 436412 g02 50 60 10 30 50 70 shdn = 0 out = 0 out = v cc temperature (c) ?50 i cc(shdn) (a) 14 25 436412 g03 8 4 ?25 0 50 2 0 16 out = 0 out = 12v 12 10 6 75 100 125 shdn = 0 v cc = 12v v cc (v) 0 i sns + i out in shutdown (a) 60 80 100 30 50 80 436412 g04 40 20 0 10 20 40 60 70 source = v cc sns = out = 48v sns = out = 24v sns = out = 12v v cc (v) 4 0 i gate(up) (a) ?4 ?8 ?12 ?16 8 12 40 80 436412 g05 ?20 ?24 6 10 20 60 hgate dgate hgate = dgate = source = v cc ?v sd = 100mv i hgate (a) 0 ?v hgate (v) 10 11 12 ?20 436412 g06 9 8 6 ?5 ?10 ?15 7 14 v cc = 12v 13 i dgate (a) 0 ?v dgate (v) 10 11 12 ?10 436412 g07 9 8 6 ?4?2 ?6 ?8 7 14 13 v cc = 12v v in (v) 4 2 ?v hgate (v) 4 6 8 10 12 14 8 12 16 20 436412 g08 24 0 2.2k 4.7k 10k r4 in figure 1 v in (v) 4 2 ?v dgate (v) 4 6 8 10 12 14 8 12 16 20 436412 g09 24 0 2.2k 4.7k 10k r4 in figure 1
ltc4364-1/ltc4364-2 6 436412f typical performance characteristics overcurrent threshold vs out voltage overvoltage tmr current vs v cc C v out overcurrent tmr current vs v cc C v out en, f lt output low vs current retry duty cycle vs v cc C v out (ltc4364-2 only) hgate pull-down current vs temperature dgate pull-down current vs temperature ideal diode regulation voltage vs v cc ideal diode regulation voltage vs temperature temperature (c) ?50 i hgate(dn) (ma) 150 175 200 25 75 436412 g10 125 100 ?25 0 50 100 125 75 50 ?v sns = 100mv or fb = 1.5v ?v hgate = 5v v cc = 12v temperature (c) ?50 i dgate(dn) (ma) 150 175 200 25 75 436412 g11 125 100 ?25 0 50 100 125 75 50 v sense ? v source = 200mv v cc = 12v ?v dgate = 5v v out (v) 0 ?v sns (mv) 40 50 60 1.5 2.5 4.0 436412 g12 30 20 10 0.5 1.0 2.0 3.0 3.5 v cc ? v out (v) 0 0 i tmr(up) (a) ?10 ?20 ?30 ?40 20 40 60 80 436412 g13 ?50 ?60 10 30 50 70 overvoltage condition out = 5v tmr = 1v v cc ? v out (v) 0 0 i tmr(up) (a) ?50 ?100 ?150 ?200 20 40 60 80 436412 g14 ?250 ?300 10 30 50 70 overcurrent condition out = 5v tmr = 1v v cc ? v out (v) 0 retry duty cycle (%) 0.4 0.6 80 436412 g15 0.2 0 20 40 60 10 30 50 70 0.8 0.3 0.5 0.1 0.7 overvoltage condition out = 16v overcurrent condition out = 0v current (ma) 0 0 v ol (v) 0.25 0.50 0.75 1.00 1.25 1.50 1 2 3 4 436412 g16 5 v cc = 12v v cc (v) 4 ?v sd (mv) 30 40 80 436412 g17 20 10 8 12 40 6 10 20 60 50 25 35 15 45 temperature (c) ?50 10 ?v sd (mv) 30 60 0 50 75 100 436412 g18 20 50 40 ?25 25 125 v cc = 4v v cc = 12v
ltc4364-1/ltc4364-2 7 436412f pin functions dgate: diode controller gate drive output. when the load current creates more than 30mv of drop across the mosfet, the dgate pin is pulled high by an internal charge pump current source and clamped to 12v above the source pin. when the load current is small, the dgate pin is actively driven to maintain 30mv across the mosfet. if reverse current develops, a 130ma fast pull-down circuit quickly connects the dgate pin to the source pin, turning off the mosfet. connect to source or leave open if unused. enout: enable output. an open-drain output that goes high impedance when the voltage at the out pin is above (v cc ? 0.7v), indicating the external mosfets are fully on. the state of the pin is latched and resets when the out pin drops below 2.2v. the internal fet is capable of sinking up to 2ma and can withstand up to 80v. connect to gnd if unused. exposed pad (de package only): exposed pad may be left open or connected to device ground (gnd). fb: voltage regulator feedback input. connect this pin to the resistive divider connected between the out pin and ground. during an overvoltage condition, the hgate pin is controlled to maintain 1.25v at the fb pin. connect to gnd to disable the overvoltage clamp. f lt : fault output. an open-drain output that pulls low after the tmr pin reaches the warning threshold of 1.25v. it indicates the pass device controlled by the hgate pin is about to turn off because either the supply voltage has stayed at an elevated level for an extended period of time (overvoltage fault) or the device is in an overcurrent con - dition (overcurrent fault). the internal fet is capable of sinking up to 2ma and can withstand up to 80v. connect to gnd if unused. gnd: device ground. hgate: surge stopper gate drive output. the hgate pin is pulled up by an internal charge pump current source and clamped to 12v above the source pin. both voltage and current amplifiers control the hgate pin to regulate the output voltage and limit the current through the mosfet. out: output voltage sense input. this pin senses the voltage at the drain of the external n-channel mosfet connected to the dgate pin. the voltage difference between v cc and out sets the fault timer current. when this difference drops below 0.7v, the enout pin goes high impedance. ov: overvoltage comparator input. when ov is above its threshold of 1.25v, the fault retry function is inhibited. when ov falls below its threshold, the hgate pin is al - lowed to turn back on when fault conditions are cleared. at power-up, an ov voltage higher than its threshold blocks turn-on of the external n-channel mosfet controlled by the hgate pin (see applications information). connect to gnd if unused. sense: current sense input. connect this pin to the input side of the current sense resistor. the current limit circuit controls the hgate pin to limit the sense voltage between the sense and out pins to 50mv if out is above 2.5v. when out drops below 1.5v, the sense voltage is reduced to 25mv for additional protection during an output short. the sense amplifier also starts a current source to charge up the tmr pin. the voltage difference between sense and out must be limited to less than 30v. connect to out if unused. shdn: shutdown control input. pulling the shdn pin below 0.5v shuts off the ltc4364 and reduces the v cc pin current to 10a. pull this pin above 2.2v or disconnect it to allow the internal current source to turn the part back on. when left open, the shdn voltage is internally clamped to 4v. the leakage current to ground at the pin should be limited to no more than 1a if no pull-up device is used to turn the part on. the shdn pin can be pulled up to 100v or below gnd by 40v without damage. source: common source input and gate drive return. connect this pin directly to the sources of the external back-to-back n-channel mosfets. source is the anode of the ideal diode and the voltage sensed between this pin and the sense pin is used to control the source-drain voltage across the n-channel mosfet (forward voltage of the ideal diode).
ltc4364-1/ltc4364-2 8 436412f pin functions tmr: fault timer input. connect a capacitor between this pin and ground to set the times for fault warning, fault turn-off, and cool down periods. either voltage regulation or current regulation starts pulling up the tmr pin. the current charging up this pin during the fault conditions increases with the voltage difference between v cc and out pins (see applications information). when tmr reaches 1.25v, the f lt pin pulls low to indicate the detection of a fault condition. if the condition persists, the pass device controlled by hgate turns off when tmr reaches the threshold of 1.35v. as soon as the fault condition disap - pears, a cool down interval commences while the tmr pin cycles 32 times between 0.15v and 1.35v with 2a charge and discharge currents. when tmr crosses 0.15v the 32nd time, the hgate pin is allowed to pull high turn - ing the pass device back on if the ov pin voltage is below its threshold for the ltc4364-2 version. the hgate pin latches low after fault time-out for the ltc4364-1. uv: undervoltage comparator input. when the uv pin falls below its 1.25v threshold, the hgate pin is pulled down with a 1ma current. when the uv pin rises above 1.25v plus the hysteresis, the hgate pin is pulled up by the internal charge pump. for ltc4364-1, after hgate is latched off, pulling the uv pin below 0.6v resets the latch and allows hgate to retry. if unused, connect to the shdn pin. v cc : positive supply voltage input. the positive supply input ranges from 4v to 80v for normal operation. it can also be pulled below ground potential by up to 40v during a reverse battery condition, without damaging the part. shutting down the ltc4364 by pulling the shdn pin to ground reduces the v cc current to 10a.
ltc4364-1/ltc4364-2 9 436412f block diagram + ? ? + ? + retry 1.35v 0.15v tmr v cc 1.25v 2a uv in shdn ov oc enout set v cc ? 0.7v 2.2v enout reset 50mv/ 25mv + ? 30mv + ? 30mv out fb 1.25v shdn uv 1.25v ov control circuitry ? + ? + ? + ? + ? + ia va ? + ? + da fd 20a 10a hgate off dgate off 12v 12v hgate source dgate f lt sense v cc charge pump f = 620khz enout gnd 436412 bd ? + ? + 32x
ltc4364-1/ltc4364-2 10 436412f operation the ltc4364 is designed to suppress high voltage surges and limit the output voltage to protect load circuitry and ensure normal operation in high availability power systems. it features an overvoltage protection regulator that drives an external n-channel mosfet (m1) as the pass device and an ideal diode controller that drives a second external n-channel mosfet (m2) for reverse input protection and output voltage holdup. the ltc4364 operates from a wide range of supply voltage, from 4v to 80v. with a clamp limiting the v cc supply, the input voltage may be higher than 80v. the input supply can also be pulled below ground potential by up to 40v without damaging the ltc4364. the low power supply requirement of 4v allows it to operate even during cold cranking conditions in automotive applications. normally, the pass device m1 is fully on, supplying current to the load with very little power loss. if the input voltage surges too high, the voltage amplifier (va) controls the gate of m1 and regulates the voltage at the out pin to a level that is set by an external resistive divider from the out pin to ground and the internal 1.25v reference. the ltc4364 also detects an overcurrent condition by monitoring the voltage across an external sense resistor placed between the sense and out pins. an active current limit circuit (ia) controls the gate of m1 to limit the sense voltage to 50mv if out is above 2.5v. in the case of a severe output short that brings out below 1.5v, the sense voltage is reduced to 25mv to reduce the stress on m1. during an overvoltage or overcurrent event, a current source starts charging up the capacitor connected at the tmr pin to ground. the pull-up current source in overcurrent condition is 5 times of that in overvoltage to accelerate turn-off. when tmr reaches 1.25v, the f lt pin pulls low to warn of impending turn-off. the pass device m1 stays on and the tmr pin is further charged up until it reaches 1.35v, at which point the hgate pin pulls low and turns off m1. the fault timer allows the load to continue functioning during brief transient events while protecting the mosfet from being damaged by a long period of input overvoltage, such as load dump in vehicles. the fault timer period decreases with the voltage across the mosfet, to help keep the mosfet within its safe operating area (soa). the ltc4364-1 latches off m1 and keeps f lt low after a fault timeout. the ltc4364-2 allows m1 to turn back on and f lt to go high impedance after a cool down timer cycle, provided the ov pin is below its threshold. after the hgate pin is latched low following fault, mo - mentarily pulling the shdn pin below 0.5v resets the fault and allows hgate to pull high for both ltc4364-1 and ltc4364 - 2. in addition, momentarily pulling the uv pin below 0.6v allows hgate to pull high after the cool down timer delay for ltc4364-1, but has no effect on ltc4364 - 2. the source and drain of mosfet m2 serve as the anode and cathode of the ideal diode. the ltc4364 controls the dgate pin to maintain a 30mv forward voltage across the drain and source terminals of m2. it reduces the power dissipation and increases the available supply voltage to the load, as compared to using a discrete blocking diode. if m2 is driven fully on and the load current results in more than 30mv of forward voltage, the forward voltage is equal to r ds(on) ? i load . in the event of an input short or a power supply failure, reverse current temporarily flows through the mosfet m2 that is on. if the reverse voltage exceeds C30mv, the ltc4364 pulls the dgate pin low strongly and turns off m2, minimizing the disturbance at the output. if the input supply drops below the gnd pin voltage, the dgate pin is pulled to the source pin voltage, keeping m2 off. when the hgate pin pulls low in any fault condi - tion, the dgate pin also pulls low, so both pass devices are turned off. if the output (and so the source pin, through the body diode of m2) drops below gnd, the hgate pin is pulled to the source pin voltage, turning m1 off and shutting down the forward current path. an input undervoltage condition is accurately detected using the uv pin. the hgate and dgate pins remain low if uv is below its 1.25v threshold. the shdn pin not only turns off the pass devices but also shuts down the internal circuitry, reducing the supply current to 10a.
ltc4364-1/ltc4364-2 11 436412f applications information some power systems must cope with high voltage surges of short duration such as those in automobiles. load circuitry must be protected from these transients, yet critical systems may need to continue operating during these events. the ltc4364 drives an n-channel mosfet (m1) at the hgate pin to limit the voltage and current to the load cir - cuitry during supply transients or overcurrent events. the selection of m1 is critical for this application. it must stay on and provide a low impedance path from the input sup - ply to the load during normal operation and then dissipate power during overvoltage or overcurrent conditions. the ltc4364 also drives a second n-channel mosfet (m2) at the dgate pin as an ideal diode to protect the load from damage during reverse polarity input conditions, and to block reverse current flow in the event the input collapses. a typical application circuit using the ltc4364 to regulate the output at 27v during input surges with reverse input protection is shown in figure 1. overvoltage fault the ltc4364 limits the voltage at the out pin during an overvoltage situation. an internal voltage amplifier regu - lates the hgate pin voltage to maintain 1.25v at the fb pin. during this period of time, the n-channel mosfet m1 remains on and supplies current to the load. this allows uninterrupted operation during brief overvoltage transient events. if the voltage regulation loop is engaged for longer than the timeout period, set by the timer capacitor, an overvolt - age fault is detected. the hgate pin is pulled down to the source pin by a 130ma current, turning m1 off. this prevents m1 from being damaged during a long period of overvoltage, such as during load dump in automobiles. after the fault condition has disappeared and a cool down period has transpired, the hgate pin starts to pull high again (ltc4364-2). the ltc4364-1 latches the hgate pin low after an overvoltage fault timeout and can be reset using the shdn or uv pin (see resetting faults). overcurrent fault the ltc4364 features an adjustable current limit that protects against short circuits and excessive load current. during an overcurrent event, the hgate pin is regulated to limit the current sense voltage across the sense and out pins ( ?v sns ) to 50mv when out is above 2.5v. the current limit sense voltage is reduced to 25mv when out is below 1.5v for additional protection during an output short. a current sense resistor is placed between sense and out and its value (r sns ) is determined by: r sns = ? v sns i lim where i lim is the desired current limit. figure 1. 4a, 12v overvoltage output regulator with reverse current protection + out sense dgate source hgate tmr gnd c tmr 47nf uv uv = 6v d1 cmz5945b 68v d3 1.5ke200a max dc: 100v/?24v max 1ms transient: 200v d4 smaj24a c1 0.1f c hg 0.1f r4 2.2k 0.5w ov = 60v ov enout fault enable 436412 f01 f lt shdn fb r5 10 r6 100 d5 1n4148w v in 12v r2 90.9k 1% r1 383k 1% r3 10k 1% r7 102k 1% r8 4.99k 1% c out 22f v out 4a clamped at 27v m1 fdb33n25 m2 fdb3682 r sns 10m v cc ltc4364
ltc4364-1/ltc4364-2 12 436412f applications information an overcurrent fault occurs when the current limit circuitry has been engaged for longer than the timeout delay set by the timer capacitor. the hgate pin is then immediately pulled low by 130ma to the source pin, turning off the mosfet m1. after the fault condition has disappeared and a cool down period has transpired, the hgate pin is allowed to pull back up and turn on the pass device (ltc4364-2). the ltc4364-1 latches the hgate pin low after the overcurrent fault timeout and can be reset using the shdn or uv pin (see resetting faults). input overvoltage comparator input overvoltage is detected with the ov pin and an ex - ternal resistive divider connected to the input (figure 1). at power-up, if the ov pin voltage is higher than its 1.25v threshold before the 100s internal power-on-reset expires, or before the input undervoltage condition is cleared at the uv pin, the hgate pin will be held low until the ov pin voltage drops below its threshold. to prevent start-up in the event the board is hot swapped into an overvoltage supply, separate resistive dividers with filtering capacitors can be used for the ov and uv pins (figure 2). the rc constants should be skewed so that uv / ov > 50. in fig - ure?2, if the board is plugged into a supply that is higher than 60v, the ltc4364 will not turn on the pass devices until the supply voltage drops below 60v. once the hgate pin begins pulling high, an input overvolt - age condition detected by ov will not turn off the pass device. instead, ov prevents the ltc4364 from restarting following a fault (see cool down period and restart). this prevents the pass device from cycling between on and off states when the input voltage stays at an elevated level for a long period of time, reducing the stress on the mosfet. input undervoltage comparator the ltc4364 detects input undervoltage conditions such as low battery using the uv pin. when the voltage at the uv pin is below its 1.25v threshold, the hgate pin pulls low to keep the pass device off. once the uv pin voltage rises above the uv threshold plus the uv hysteresis (50mv typical), the hgate pin is allowed to pull up without go - ing through a timer cycle. in figure 1 and figure 2, the input uv threshold is set by the resistive dividers to 6v. an undervoltage condition does not produce an output at the f lt pin. fault timer the ltc4364 includes an adjustable fault timer. con - necting a capacitor from the tmr pin to ground sets the delay period before the mosfet m1 is turned off during an overvoltage or overcurrent fault condition. the same capacitor also sets the cool down period before m1 is allowed to turn back on after the fault condition has disappeared. once a fault condition is detected, a current source charges up the tmr pin. the current level varies depending on the voltage drop across the v cc pin and the out pin, corresponding to the mosfet v ds . the on time is inversely proportional to the voltage drop across the mosfet. this scheme therefore takes better advantage of the available safe operating area (soa) of the mosfet than would a fixed timer current. the timer current starts at around 2a with 0.5v or less of v cc C v out , increasing linearly to 50a with 75v of v cc C v out during an overvoltage fault (figure 3a): i tmr(up)ov = 2a + 0.644[a/v] ? (v cc C v out C 0.5v) during an overcurrent fault, the timer current starts at 10a with 0.5v or less of v cc C v out and increases to 260a with 75v of v cc C v out (figure 3b): i tmr(up)oc = 10a + 3.36[a/v] ? (v cc C v out C 0.5v) this arrangement allows the pass device to turn off faster during an overcurrent event, since more power is dissipated under this condition. refer to the typical performance characteristics section for the timer current at different v cc C v out in both overvoltage and overcurrent events. 475k v in uv = 6v 0v = 60v 436412 f02 10k 383k 100k uv = (383k||100k) ? 10nf ov = (475k||10k) ?1nf 10nf 1nf uv ltc4364 ov figure 2. external uv and ov configuration blocks start-up into an overvoltage condition
ltc4364-1/ltc4364-2 13 436412f i tmr = 5a i tmr = 5a 0 0 1.25 1.35 1.25 time time 436412 f03 t warning 20ms/f (3a) overvoltage fault timer current (3b) overcurrent fault timer current t warning 0.38ms/f t warning 20ms/f t f lt 25ms/f t f lt 4.8ms/f t warning 2.38ms/f t f lt 29.8ms/f t f lt 156ms/f 1.35 v tmr (v) v tmr (v) v cc ? v out = 75v (i tmr = 50a) v cc ? v out = 75v =10v v cc ? v out = 75v =10v v cc ? v out = 75v (i tmr = 260a) v cc ? v out = 10v (i tmr = 42a) v cc ? v out = 10v (i tmr = 8a) figure 3. fault timer current of the ltc4364 when the voltage at the tmr pin, v tmr , reaches 1.25v, the f lt pin pulls low to indicate the detection of a fault condition and provide warning of the impending power loss. in the case of an overvoltage fault, the timer current then switches to a fixed 5a. the interval between f lt asserting low and the mosfet m1 turning off is given by: t warning = c tmr ? 100mv 5a this constant early warning period allows the load to perform necessary backup or housekeeping functions before the supply is cut off. after v tmr crosses the 1.35v threshold, the pass device m1 turns off immediately. note that during an overcurrent event, the timer current is not reduced to 5a after v tmr has reached 1.25v threshold, since it would lengthen the overall fault timer period and cause more stress on the power transistor during an overcurrent event. assuming v cc C v out remains constant, the on-time of hgate during an overvoltage fault is: t ov = c tmr ? 1.25v i tmr(up)ov + c tmr ? 100mv 5v and that during an overcurrent fault is: t oc = c tmr ? 1.35v i trm(up)oc if the fault condition disappears after tmr reaches 1.25v but is lower than 1.35v, the tmr pin is discharged by 2a. when tmr drops to 0.15v, the f lt pin resets to a high impedance state. cool down period and restart as soon as tmr reaches 1.35v and hgate pulls low in a fault condition, the tmr pin starts discharging with a 2a current. when the tmr pin voltage drops to 0.15v, tmr charges with 2a. when tmr reaches 1.35v, it starts discharging again with 2a. this pattern repeats 32 times to form a long cool down timer period before retry (fig - ure?4). at the end of the cool down period (when the tmr pin voltage drops to 0.15v the 32nd time), the voltage at the ov pin is checked. if the ov voltage is above its 1.25v threshold, retry is inhibited and the hgate pin remains low. if the ov pin voltage is below 1.25v minus the ov hysteresis, the ltc4364-2 retries, pulling the hgate pin up and turning on the pass device m1. the f lt pin will then go to a high impedance state. the total cool down timer period is given by: t cool = 63 ? c tmr ? 1.2v 2a the latch-off version, ltc4364-1, latches the hgate and f lt pins low after a fault timeout. it also generates the cool down tmr pulses as shown in figure 4, but does not retry after the cool down period. there are two ways to restart the part. the first method is to pull the uv pin below 0.6v momentarily (>10s) after the cool down timer applications information
ltc4364-1/ltc4364-2 14 436412f period. if the uv reset pulse is asserted during the cool down period, the tmr pulses are unaffected and the part restarts after the cool down period ends. if ov is higher than 1.25v while uv reset pulse is applied, the part will not restart until ov drops below 1.25v even if the cool down period ends. the second method of restarting the ltc4364-1 is to pulse the shdn pin low for more than 200s. if this is applied during the cool down period, the cool down timer is reset with 1ma quickly discharging the tmr pin, and the part will restart when tmr drops below 0.15v. if the shdn reset pulse is applied after the cool down period, the part restarts immediately. sufficient cool down time should be allowed before toggling the shdn pin to prevent overstressing the pass device. a uv reset pulse has no effect on the operation of the ltc4364-2. however, if a shdn reset pulse as described above is asserted in the middle of the cool down period, the tmr pin quickly discharges with 1ma and the ltc4364-2 is allowed to restart once tmr drops below 0.15v. the ov pin gates the restart of either ltc4364-1 or ltc4364-2 with a shdn reset pulse. the part will not restart until ov drops below 1.25v. reverse input protection the ltc4364 can withstand reverse voltage without dam - age. the v cc , shdn , uv, ov, hgate, source and dgate pins can all withstand up to C40v with respect to gnd. the ltc4364 controls a second n-channel mosfet (m2) as an ideal diode to replace an in-line blocking diode for reverse input protection with minimum voltage drop in normal operation. in the event of an input short or a power supply brownout, reverse current may temporarily flow through m2. the ltc4364 detects this reverse current and immediately pulls the dgate pin to the source pin, turning off m2. this minimizes discharge of the output reservoir capacitor and holds up the output voltage. in the case where the input supply drops below ground, the source pin is pulled below ground through the body diode of m1. the ltc4364 responds to this condition by shorting the dgate pin to the source pin, keeping m2 off. mosfet selection the ltc4364 drives two n-channel mosfets, m1 and m2, as the pass devices to conduct the load current (figure?1). the important features are on-resistance, r ds(on) , the maximum drain-source voltage, v (br)dss , the threshold voltage, and the safe operating area, soa. the maximum drain-source voltage rating must be higher than the maximum input voltage. if the output is shorted to ground or in an overvoltage event, the full supply voltage will appear across m1. if the input is shorted to ground, m2 will be stressed by the voltage held up at the output. the gate drive for both mosfets is guaranteed to be more than 10v and less than 16v for those applications with v cc higher than 8v. this allows the use of standard threshold voltage n-channel mosfets. for systems with v cc less than 8v, a logic-level mosfet is required since the gate drive can be as low as 5v. for supplies of 24v or higher, a 15v zener diode is recommended to be placed between 1.35v 1.25v fb tmr ?v hgate f lt 1.25v <1.25v 1st 2nd 31st 0.15v 32nd 436412 f04 ov < 1.25v checked cool down period figure 4. auto-retry cool down timer cycle following an overvoltage fault (ltc4364-2 only) applications information
ltc4364-1/ltc4364-2 15 436412f gate and source of each mosfet for extra protection (figures 8 to 10). transient stress in the mosfet the soa of the mosfet must encompass all fault condi - tions. in normal operation the pass devices are fully on, dissipating very little power. but during either overvoltage or overcurrent faults, the hgate pin is controlled to regulate either the output voltage or the current through mosfet m1. large current and high voltage drop across m1 can coexist in these cases. the soa curves of the mosfet must be considered carefully along with the selection of the fault timer capacitor. during an overvoltage event, the ltc4364 drives the pass mosfet m1 to regulate the output voltage at an acceptable level. the load circuitry may continue operating throughout this interval, but only at the expense of dissipation in the mosfet pass device. mosfet dissipation or stress is a function of the input voltage waveform, regulation voltage and load current. the mosfet must be sized to survive this stress. most transient event specifications use the model shown in figure 5. the idealized waveform comprises a linear ramp of rise time t r , reaching a peak voltage of v pk and exponentially decaying back to v in with a time constant of . a typical automotive transient specification has constants of t r = 10s, v pk = 80v and = 1ms. a surge condition known as load dump has constants of t r = 5ms, v pk = 60v and = 200ms. mosfet stress is the result of power dissipated within the device. for long duration surges of 100ms or more, stress is increasingly dominated by heat transfer; this is a matter of device packaging and mounting, and heat sink thermal mass. this is analyzed by simulation, using the mosfets thermal model. for short duration transients of less than 100ms, mos - fet survival is increasingly a matter of soa, an intrinsic property of the mosfet. soa quantifies the time required at any given condition of v ds and i d to raise the junction temperature of the mosfet to its rated maximum. mosfet soa is expressed in units of watt-squared-seconds (p 2 t), which is an integral of p(t) 2 dt over the duration of the transient. this figure is essentially constant for intervals of less than 100ms for any given device type, and rises to infinity under dc operating conditions. destruction mechanisms other than bulk die temperature distort the lines of an accurately drawn soa graph so that p 2 t is not the same for all combinations of i d and v ds . in particular p 2 t tends to degrade as v ds approaches the maximum rating, rendering some devices useless for absorbing energy above a certain voltage. calculating transient stress to select a mosfet suitable for any given application, the soa stress of m1 must be calculated for each input transient which shall not interrupt operation. it is then a simple matter to choose a device which has adequate soa to survive the maximum calculated stress. p 2 t for a prototypical transient waveform is calculated as follows (figure 6). let: a = v reg C v in b = v pk C v in where v in = nominal input voltage. v pk v in 436412 f05 t r figure 5. prototypical transient waveform figure 6. safe operating area required to survive prototypical transient waveform v pk = 80v = 1ms v in = 12v 436412 f06 v reg = 16v t r = 10s applications information
ltc4364-1/ltc4364-2 16 436412f then: p 2 t = i load 2 1 3 t r b ? a ( ) 3 b + 1 2 2a 2 in b a + 3a 2 + b 2 ? 4ab ? ? ? ? ? ? ? ? ? ? ? ? ? ? typically v reg v in and >> t r simplifying the above to: p 2 t = 1 2 i load 2 v pk ? v reg ( ) 2 for the transient conditions of v pk = 80v, v in = 12v, v reg = 16v, t r = 10s and = 1ms, and a load current of 3a, p 2 t is 18.4w 2 seasily handled by a mosfet in a d-pak package. the p 2 t of other transient waveshapes is evalu - ated by integrating the square of mosfet power versus time. ltspice? can be used to simulate timer behavior for more complex transients and cases where overvoltage and overcurrent faults coexist. short-circuit stress soa stress of m1 must also be calculated for output short- circuit conditions. short-circuit p 2 t is given by: p 2 t = v in ? ? v sns r sns ? ? ? ? ? ? 2 ? t oc where ?v sns is the overcurrent fault threshold and t oc is the overcurrent timer interval. for v in = 15v, out = 0v, ?v sns = 25mv, r sns = 12m and c tmr = 100nf, p 2 t is 2.2w 2 sless than the transient soa calculated in the previous example. nevertheless, to account for circuit tolerances this figure should be doubled to 4.4w 2 s. limiting inrush current and hgate pin compensation the ltc4364 limits the inrush current to any load capaci - tance by controlling the hgate pin voltage slew rate. an external capacitor, c hg , can be connected from hgate to ground to slow down the inrush current further at the expense of slower turn-off time. the gate capacitor is set at: c hg = i hgate(up) i inrush ? c l where i hgate(up) is the hgate pin pull-up current, i inrush is the desired inrush current, c l is total load capacitance at the output. in typical applications, a c hg of 6.8nf is recommended for loop compensation during overvoltage and overcurrent events. with input voltage steps faster than 5v/s, a larger gate capacitor helps prevent self enhancement of the n-channel mosfet. the added gate capacitor slows down the turn-off time during fault conditions and allows higher peak currents to build up during an output short event. if this is a concern, an extra resistor, r6, in series with c hg can restore the turn-off time. a diode, d5, should be placed across r6 with the cathode connected to c hg as shown in figure 1. in a fast transient input step, d5 provides a bypass path to c hg for the benefit of holding hgate low and preventing self enhancement. shutdown the ltc4364 can be shut down to a low current mode by pulling shdn below 0.5v. the quiescent v cc current drops to 10a for both the ltc4364-1 and the ltc4364-2. the shdn pin can be pulled up to 100v or below gnd by up to 40v without damage. leaving the pin open allows an internal current source to pull it up to about 4v and turn the part on. the leakage current at the pin should be limited to no more than 1a if no pull-up device is used to help turn it on. supply transient protection the ltc4364 is tested to operate to 80v and guaranteed to be safe from damage between 100v and ?40v. voltage transients above 100v or below ?40v may cause permanent damage. during a short-circuit condition, the large change in current flowing through power supply traces coupled with parasitic inductances from associated wiring can cause destructive voltage transients in both positive and negative directions at the v cc , source, and out pins. to reduce the voltage transients, minimize the power trace parasitic inductance by using short, wide traces. a small rc filter (r4 and c1 in figure 1) at the v cc pin filters high voltage spikes of short pulse width. applications information
ltc4364-1/ltc4364-2 17 436412f another way to limit supply transients above 100v at the v cc pin is to use a zener diode and a resistor, d1 and r4, as shown in figure 1. d1 clamps voltage spikes at the v cc pin while r4 limits the current through d1 to a safe level during the surge. in the negative direction, d1 along with r4 clamps the v cc pin near gnd. the inclusion of r4 in series with the v cc pin increases the minimum required supply voltage due to the extra voltage drop across the resistor, which is determined by the supply current of the ltc4364 and the leakage current of d1. 2.2k adds about 1v to the minimum operating voltage. for sustained, elevated suppy voltages, the power dissipa - tion of r4 becomes unacceptable. this can be resolved by using an external npn transistor (q1 in figure 7) as a buffer. to protect q1 against supply reversal, block the collector of q1 with a series diode or tie it to the cathode of d3 and d4 in figure 1. transient suppressor d3 in figure 1 clamps the input voltage to 200v for voltage transients higher than 200v, to prevent breakdown of m1. it also blocks forward con - duction in d4. d4 limits the source pin voltage to 24v below gnd when the input goes negative. c out helps absorb the inductive energy at the output upon a sudden input short, protecting the out and sense pins. output port protection in applications where the output is on a connector, as shown in figure 14, if the output is plugged into a supply that is higher than the input, the ideal diode mosfet, m2, turns off to open the backfeeding path. in the case where the output port is plugged into a supply that is below gnd, the source pin is pulled below gnd through the body diode of m2. the ltc4364 responds to this condition by shorting the hgate pin to the source pin, turning m1 off and shutting down the current path from v in to v out . design example as a design example, consider an application with the following specifications: v in = 8v to 14v dc with a peak transient of 200v and decay time constant of 1ms, v out 27v, minimum current limit i lim(min) at 4a, low-battery detection at 6v, input overvoltage level at 60v, and 1ms of overvoltage early warning (figure 1). selection of cmz5945b for d1 will limit the voltage at the v cc pin to less than 71v during the 200v surge. the minimum required voltage at the v cc pin is 4v when v in is at 6v; the maximum supply current for ltc4364 is 750a. the maximum value for r4 to ensure proper operation is: r4 = 6v ? 4v 0.75ma = 2.7k select 2.2k for r4 to accommodate all conditions. with the minimum zener voltage at 64v, the peak current through r4 into d1 is then calculated as: i d1(pk) = 200v ? 64v 2.2k = 62ma which can be handled by the cmz5945b with a peak power rating of 200w at 10/1000s. with a bypass capacitance of 0.1f (c1), along with r4 of 2.2k, high voltage transients up to 250v with a pulse width less than 20s are filtered out at the v cc pin. next, calculate the resistive divider value to limit v out to 27v during an overvoltage event: v reg = 1.25v ? r7 + r8 ( ) r8 = 27v applications information v cc ltc4364 gnd 436412 f07 c1 100nf q1 pzta42 v in 200v d1 cmz5945b 68v r4 22k 1/4w figure 7. buffering v cc to extend input supply range output bypassing the out and sense pins can withstand up to 100v above and 20v below gnd. in all applications the output must be bypassed with at least 22f low esr electrolytic (c out in figure 1) to stabilize the voltage and current limiting loops, and to minimize capacitive feedthrough of input transients. total ceramic bypassing of up to one-tenth the total electrolytic capacitance is permissible without compromising performance.
ltc4364-1/ltc4364-2 18 436412f choosing 250a for the resistive divider: r8 = 1.25v 250a = 5k select 4.99k for r8. r7 = 27v ? 1.25v ( ) ? r8 1.25v = 102.8k the closest standard value for r7 is 102k. now, calculate the sense resistor, r sns , value: r sns = ? v sns(min) i lim = 45mv 4a = 11m ? choose 10m for r sns . c tmr is then chosen for 1ms of early warning time: c tmr = 1ms ? 5a 100mv = 50nf the closest standard value for c tmr is 47nf. finally, calculate r1, r2 and r3 for 6v low battery detec - tion and 60v input overvoltage level: 6v r1 + r2 + r3 = 1.25v r2 + r3 60v r1 + r2 + r3 = 1.25v r3 simplify the equations and choose 10k for r3 to get: r2 = 60v 6v ? 1 ? ? ? ? ? ? ? r3 = 9 ? r3 = 90k r1 = 6v 1.25v ? 1 ? ? ? ? ? ? ? r2 + r3 ( ) = 3.8 ? r1 + r2 ( ) = 380k select 90.9k for r2 and 383k for r1. the pass device, m1, should be chosen to withstand an output short condition with v cc = 14v. in the case of a severe output short where v out = 0v, i tmr(up) = 55a and the total overcurrent fault time is: t oc = c tmr ? v tmr(g) i trm(up) = 47nf ? 1.35v 55a = 1.15ms the maximum power dissipation in m1 is: p = ? v ds(m1) ? ? v sns(max) r sns = 14v ? 32mv 10m ? = 45w the corresponding p 2 t is 2.3w 2 s. during an output overload or soft short, the voltage at the out pin could stay at 2v or higher. the total overcurrent fault time when v out = 2v is: t oc = 47nf ? 1.35v 49a = 1.3ms the maximum power dissipation in m1 is: p = 14v ? 2v ( ) ? 55mv 10m ? = 66w the corresponding p 2 t is 5.7w 2 s. both of the above condi - tions are well within the safe operating area of fdb33n25. to select the pass device, m2, first calculate r ds(on) to achieve the desired forward drop v fw at maximum load current (5.5a). if v fw = 0.25v: r ds(on) v fw i load(max) = 0.25v 5.5a = 45.5m ? the fdb3682 offers a maximum r ds(on) of 36m at v gs = 10v so is a good fit. its minimum bv dss of 100v is also sufficient to handle v out transients up to 100v during an input short-circuit event. layout considerations to achieve accurate current sensing, use kelvin connections to the current sense resistor, r sns . limit the resistance from the source pin to the sources of the mosfets to below 10. the minimum trace width for 1oz copper foil is 0.02" per amp to ensure the trace stays at a reason - able temperature. note that 1oz copper exhibits a sheet resistance of about 530?/square. small resistances can cause large errors in high current applications. noise im - munity will be improved significantly by locating resistive dividers close to the pins with short v cc and gnd traces. applications information
ltc4364-1/ltc4364-2 19 436412f typical applications figure 8. 2a wide range hot swap controller with circuit breaker figure 9. 28v hot swap with overvoltage output regulation at 27v, circuit breaker, and reverse current protection figure 10. 48v hot swap with overvoltage output regulation at 72v, circuit breaker, and reverse current protection + out sense dgate source hgate tmr gnd c tmr 0.22f uv ov enout 436412 f08 f lt shdn fb r5 10 v in 5v to 28v r2 44.2k r1 118k uv 4.2v ov 36v d1 smat70a r3 5.9k c load 100f v out 2a m1 sud50n03-9 r sns 20m c hg 47nf d6 ddz9702t v cc ltc4364 + out sense dgate source hgate tmr gnd c tmr 0.1f uv ov enout 436412 f09 f lt shdn fb r5 10 r8 4.02k v in 18v to 33v r2 6.04k ov 45v uv 15v r1 100k r3 3.01k c load 100f v out 2.5a clamped at 36v m1 fdb3632 d6 ddz9702t m2 fdms86101 r sns 15m c hg 47nf v cc ltc4364 r7 110k d7 ddz9702t + out sense dgate source hgate tmr gnd c tmr 0.1f uv ov enout 436412 f10 f lt shdn fb r5 10 r4 2.2k v in 36v to 72v r1 205k uv 36v ov 76v r2 3.92k r3 3.48k r7 226k r8 4.02k c load 330f v out 4a clamped at 72v d1 cmz5945b 68v m1 fdb33n25 m2 fdb3632 r sns 10m c hg 47nf v cc ltc4364 d6 ddz9702t d7 ddz9702t
ltc4364-1/ltc4364-2 20 436412f typical applications figure 11. redundant supply diode-or with overvoltage surge protection figure 12. high side switch with ideal diode for load protection + out sense dgate source hgate tmr c tmra 0.22f uv ov enout f lt shdn fb r5a 10 v ina 12v r7a 59k r8a 4.99k c outa 22f v out clamped at 16v m1a fdd16an08a0 m2a fdd16an08a0 r snsa 10m c hga 6.8nf v cc ltc4364 + out sense dgate source hgate tmr c tmrb 0.22f uv ov enout f lt shdn fb r5b 10 v inb 12v r7b 59k r8b 4.99k 436412 f11 c outb 22f m1b fdd16an08a0 m2b fdd16an08a0 r snsb 10m c hgb 6.8nf v cc ltc4364 gnd gnd out sense dgate source hgate tmr gnd uv shdn m3 vn2222 100k ov enout 436412 f12 f lt shdn fb v in 12v c load v out m1 fdb3632 m2 fdms86101 v cc ltc4364
ltc4364-1/ltc4364-2 21 436412f typical applications figure 13. overvoltage regulator with output keep alive during shutdown package description de package 14-lead plastic dfn (4mm 3mm) (reference ltc dwg # 05-08-1708 rev b) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 (2 sides) 4.00 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wged-3) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.70 0.10 0.75 0.05 r = 0.115 typ r = 0.05 typ 3.00 ref 1 7 14 8 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (de14) dfn 0806 rev b pin 1 notch r = 0.20 or 0.35 45 chamfer 0.25 0.05 0.50 bsc 3.30 0.10 1.70 0.05 3.00 ref recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 2.20 0.05 0.70 0.05 3.60 0.05 package outline 0.25 0.05 3.30 0.05 0.50 bsc + out sense dgate source hgate tmr gnd c tmr 0.1f uv ov enout 436412 f13 f lt shdn fb r4 2.2k r5 10 v in 12v r1 191k uv 6v ov 30v r2 40.2k r3 10k r7 287k r8 24.9k c out 22f d8 1n4746a 18v, 1w v out 4a clamped at 16v d1 cmz5945b 68v m1 fdd16an08a0 m2 fdd16an08a0 r sns 10m r9 1k, 1w c hg 6.8nf v cc ltc4364
ltc4364-1/ltc4364-2 22 436412f ms package 16-lead plastic msop (reference ltc dwg # 05-08-1669 rev ?) msop (ms16) 1107 rev ? 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16151413121110 1 2 3 4 5 6 7 8 9 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 4.039 0.102 (.159 .004) (note 3) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc4364-1/ltc4364-2 23 436412f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. .016 ? .050 (0.406 ? 1.270) .010 ? .020 (0.254 ? 0.508) 45 0 ? 8 typ .008 ? .010 (0.203 ? 0.254) 1 n 2 3 4 5 6 7 8 n/2 .150 ? .157 (3.810 ? 3.988) note 3 16 15 14 13 .386 ? .394 (9.804 ? 10.008) note 3 .228 ? .244 (5.791 ? 6.197) 12 11 10 9 s16 rev g 0212 .053 ? .069 (1.346 ? 1.752) .014 ? .019 (0.355 ? 0.483) typ .004 ? .010 (0.101 ? 0.254) .050 (1.270) bsc .245 min n 1 2 3 n/2 .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) 4. pin 1 can be bevel edge or a dimple s package 16-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610 rev g)
ltc4364-1/ltc4364-2 24 436412f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2012 lt 0712 ? printed in usa related parts typical application part number description comments lt ? 4356-1/lt4356-2 LT4356-3 surge stopper lt4356-1: 7a shutdown mode lt4356-2: auxiliary amplifier alive in shutdown mode LT4356-3: fault latchoff ltc4363 high voltage surge stopper 4v to 80v, v cc clamp, adjustable output voltage clamp, 60v reverse input protection, overcurrent protection ltc4366 floating surge stopper 9v to >500v operation, adjustable output voltage clamp ltc4357 positive high voltage ideal diode controller 0.5s turn-off time, 9v to 80v ltc4359 ideal diode controller with reverse input protection 4v to 80v operation, C40v reverse-input protection, low 13a shutdown current ltc4352 ideal mosfet oring diode external n-channel mosfets replace oring diodes, 0v to 18v ltc4354 negative voltage diode-or controller controls two n-channel mosfets, 1s turn-off, 80v operation ltc4355 positive voltage diode-or controller controls two n-channel mosfets, 0.5s turn-off, 80v operation ltc4365 window passer - ov, uv and reverse supply protection controller 2.5v to 34v operation, protects 60v to C40v figure 14. 0.25a, 12v surge stopper with output port protection out sense dgate source hgate uv ov 0.1f enout 436412 f14 f lt shdn fb r5 10 v in 12v r2 90.9k 1% r1 383k 1% uv 6v ov 60v r3 10k 1% *protected against backfeeding or forward conducting from ?20v to 50v v out * clamped at 18v m1 fdb3632 m2 fdms86101 r sns 0.2 c hg 6.8nf c in 10f 10f 50v cer 10f 50v cer v cc ltc4364 gnd tmr r8 4.99k 1% r9 16.9k 1% r esr 100m d2 ddz9702t 15v r7 49.9k 1%

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